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1. product pro?le 1.1 general description the ip4853cx24 is a device that fully integrates a bidirectional level shifter or voltage translator, emi ?lter and esd protection diodes. it is speci?cally designed to be used for memory card interfaces such as sd, t-?ash and multi media card (mmc) memory cards. the integrated power supply unit supplies memory cards with 2.9 v directly from the battery. this enables a 1.8 v operating host side device (e.g. a processor interface) to communicate with a 2.9 v compliant memory card using its integrated level shifter. radiation from digital signals in the higher harmonics, close to the typical mobile phone frequencies, is suppressed by the emi ?lter. the ip4853cx24 is fabricated using monolithic silicon technology in a wafer-level chip-scale package (wlcsp) with 0.4 mm pitch. 1.2 features n darkgreen compliant n pb-free, rohs compliant and halogen free package n integrated emi ?lters n feedback channel for clock synchronization n integrated esd protection according to iec 61000-4-2, level 4 n wlcsp with 0.4 mm pitch 1.3 applications n sd memory card, t-?ash memory card and mmc interfaces in latest electronic appliances such as: u mobile phone or smart phone u digital camera u card reader in (laptop) computer n appliance which requires one or more of the following features: u level shifting and voltage translation from 1.8 v to 2.9 v and from 2.9 v to 1.8 v u esd protection according to iec 61000-4-2, level 4 u power supply regulation from battery to 2.9 v card memory voltage u emi ?ltering u integration of interface-speci?c biasing resistor network ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter with psu, emi ?lter and esd protection rev. 01 22 july 2008 product data sheet
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 2 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 2. pinning information 2.1 pinning 2.2 pin description fig 1. pin con?guration for wlcsp24 package table 1. pin allocation table pin symbol pin symbol pin symbol pin symbol pin symbol a1 data2_h a2 dir_cmd a3 dir_0 a4 v bat a5 data2_sd b1 data3_h b2 n.c. b3 v cc b4 vsd b5 data3_sd c1 clk_in c2 enable c3 gnd c4 gnd c5 clk_sd d1 data0_h d2 cmd_h d3 cd d4 cmd_sd d5 data0_sd e1 data1_h e2 clk_fb e3 dir_1_3 e4 wp e5 data1_sd 001aah951 ip4853cx24/lf transparent top view d b e c a 24 135 bump a1 index area table 2. pin description symbol [1] pin type [2] description data2_h a1 i/o data 2 input or output on host side dir_cmd a2 i direction control input for command dir_0 a3 i direction control input for data 0 v bat a4 s supply voltage from battery for regulator data2_sd a5 i/o data 2 input or output on memory card side data3_h b1 i/o data 3 input or output on host side n.c. b2 - not connected v cc b3 s supply voltage for host side circuits vsd b4 o output supply voltage for memory card data3_sd b5 i/o data 3 input or output on memory card side clk_in c1 i clock signal input
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 3 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter [1] the pin names relate particularly to sd memory cards, but also apply to t-?ash and mmc memory cards. [2] i = input, o = output, i/o = input and output, s = power supply. 3. ordering information enable c2 i device enable input gnd c3 s supply ground gnd c4 s supply ground clk_sd c5 o clock signal output on memory card side data0_h d1 i/o data 0 input or output on host side cmd_h d2 i/o command input or output on host side cd d3 o card detect switch biasing output cmd_sd d4 i/o command input or output on memory card side data0_sd d5 i/o data 0 input or output on memory card side data1_h e1 i/o data 1 input or output on host side clk_fb e2 o clock feedback output to host dir_1_3 e3 i direction control input for data 1, data 2 and data 3 wp e4 o write protect switch biasing output data1_sd e5 i/o data 1 input or output on memory card side table 2. pin description continued symbol [1] pin type [2] description table 3. ordering information type number package name description version ip4853cx24/lf wlcsp24 wafer level chip-size package; 24 bumps; 2.01 2.01 0.61 mm ip4853cx24/lf
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 4 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 4. block diagram fig 2. block diagram 001aah980 cd voltage regulator v bat clk_in vsd clk_sd clk_fb dir_cmd cmd_h r13 r14 r7 r12 r11 r10 r1 r2 dir_0 data0_h cmd_sd data0_sd r3 dir_1_3 data1_h r4 data2_h data3_h v cc enable d3 c2 b3 b1 a1 e1 e3 d1 a3 e4 b5 a5 e5 d5 d4 c5 b4 a4 c1 e2 a2 d2 c3, c4 data1_sd data2_sd host side sd card side data3_sd r5 r6 wp r15 gnd ip4853cx24
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 5 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 5. functional description 5.1 logic control signals [1] h = high; l = low and x = dont care. table 4. control signal truth table v bat 3 2.7 v. control host side memory card side pin level [1] pin function pin function pin enable = high and v cc 3 1.62 v dir_cmd h cmd_h input cmd_sd output l cmd_h output cmd_sd input dir_0 h data0_h input data0_sd output l data0_h output data0_sd input dir_1_3 h data1_h, data2_h, data3_h input data1_sd, data2_sd, data3_sd output l data1_h, data2_h, data3_h output data1_sd, data2_sd, data3_sd input - - clk_fb output clk_sd output pin enable = low or v cc 0.8 v dir_cmd x cmd_h high-z cmd_sd high-z dir_0 x data0_h high-z data0_sd high-z dir_1_3 x data1_h, data2_h, data3_h high-z data1_sd, data2_sd, data3_sd high-z - - clk_fb high-z clk_sd high-z
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 6 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 6. limiting values 7. recommended operating conditions [1] the device is still fully functional, but the voltage on pin vsd might drop below the recommended memory card supply voltage . table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +3.5 v v bat battery supply voltage transient (4 ms) - 0.5 +5.5 v operating - 0.5 +5.0 v v i input voltage at i/o pins transient (4 ms) - 0.5 +5.5 v operating - 0.5 +5.0 v p tot total power dissipation t amb = - 30 c to +70 c - 550 mw t stg storage temperature - 55 +150 c t amb ambient temperature - 30 +85 c v esd electrostatic discharge voltage pin v bat and all memory card side pins to ground; according to iec 61000-4-2, level 4 contact - 8000 v air discharge - 15000 v all other pins to ground; according to iec 61340-3-1, human body model - 2000 v table 6. operating conditions symbol parameter conditions min max unit v cc supply voltage 1.62 2.1 v v bat battery supply voltage 2.7 [1] 5.0 v v i input voltage host side 0 2.1 v memory card side; v bat 3 3.2 v 0 2.9 v v o output voltage active mode; pin enable = high host side 0 v cc v memory card side 0 v o(reg) v d t/ d v time difference over voltage change host side; between 0.2v cc and 0.7v cc - 2 ns/v memory card side; between 0.2v o(reg) and 0.7v o(reg) - 2 ns/v
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 7 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 8. static characteristics [1] typical values are measured at t amb =25 c. [2] emi ?lter line capacitance per data channel from i/o pin to driver; c ch is guaranteed by design. table 7. static characteristics at recommended operating conditions; t amb = - 30 c to +85 c; voltages are referenced to gnd (ground = 0 v); unless otherwise speci?ed. symbol parameter conditions min typ [1] max unit voltage regulator output: pin vsd v o(reg) regulator output voltage c l = 1 m f i o(reg) = 0 a - 2.9 2.987 v i o(reg) = 200 ma; v bat 3 2.9 v 2.75 - - v d v do(reg) regulator dropout voltage variation i o(reg) = 200 ma - - 150 mv i o(reg) regulator output current - 200 - ma i o(sc) short-circuit output current - - 500 ma i q(reg) regulator quiescent current pin enable = high (active mode) - - 200 m a pin enable = low (not active mode) --1 m a c ext external capacitance recommended capacitor at pin vsd - 1.0 - m f control and data inputs host side: pins enable, dir_0, dir_1_3, dir_cmd, clk_in and data0_h to data3_h v ih high-level input voltage 0.65 v cc --v v il low-level input voltage - - 0.3 v c ch channel capacitance v i = 0 v; f i = 1 mhz [2] - - 20 pf memory card side: pins cmd_sd and data0_sd to data3_sd v ih high-level input voltage 0.65 v o(reg) --v v il low-level input voltage - - 0.3 v c ch channel capacitance v i = 0 v; f i = 1 mhz [2] - - 20 pf control and data outputs host side: pins clk_fb, cmd_h and data0_h to data3_h v oh high-level output voltage i o = - 3 ma; v i = v ih v cc - 0.45 - - v v ol low-level output voltage i o = 3 ma; v i = v il - - 0.45 v memory card side: pins clk_sd, cmd_sd and data0_sd to data3_sd, cd and wp v oh high-level output voltage i o = - 6 ma; v i = v ih v o(reg) - 0.45 - - v v ol low-level output voltage i o = 6 ma; v i = v il - - 0.45 v i lrzd zener diode reverse leakage current v i = 3 v - - 100 na r s series resistance r1 to r6; tolerance 20 % 32 40 48 w r pd pull-down resistance r7; tolerance 30 % 329 470 611 k w r pu pull-up resistance r10; tolerance 30 % 10.5 15 19.5 k w r11 to r13; tolerance 30% 49 7091k w r14 and r15; tolerance 30 % 70 100 130 k w
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 8 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 9. dynamic characteristics [1] guaranteed by design. table 8. voltage regulator t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit voltage regulator output: pin vsd psrr power supply rejection ratio v bat = 3.0 v; v ripple(p-p) = 223.6 mv (0 dbm); r source =50 w f ripple = 1 khz - - 40 db f ripple = 10 khz - - 30 db t startup(reg) regulator start-up time v cc = 1.8 v; v bat = 3.0 v; i o(reg) = 200 ma; c l =1 m f; see figure 3 - - 200 m s measuring points: enable at 0.5v cc and regulator output at 0.97v o(reg) fig 3. regulator start-up time 001aah981 v i gnd 97 % 50 % t startup(reg) v o(reg) regulator output enable 0 v table 9. frequency response of integrated emi ?lters t amb = 25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit clock, command and data channels [1] a il insertion loss r source = 50 w ; c l = 10 pf; r l =50 w f i = 401 mhz to 800 mhz 9 - - db f i = 801 mhz to 1.4 ghz - 17 - db f i = 1.4 ghz to 6.0 ghz - 32 - db
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 9 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter table 10. output rise and fall times v bat = 3.5 v; v o(reg) = 2.9 v; unless otherwise speci?ed. transition time is the same as output rise time and output fall time. for timing diagrams and test circuit see figure 4 and figure 5 . symbol parameter conditions min typ max unit memory card side outputs: pins clk_sd, cmd_sd and data0_sd to data3_sd reference points at 70 % and 20 % t t transition time c l = 20 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 1.5 2.5 ns t amb = - 30 c; v cc = 1.9 v - 1.5 2.5 ns t amb = +70 c; v cc = 1.62 v - 1.8 2.8 ns c l = 40 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 2.7 3.6 ns t amb = - 30 c; v cc = 1.9 v - 2.7 3.6 ns t amb = +70 c; v cc = 1.62 v - 2.9 3.8 ns reference points at 90 % and 10 % t t transition time c l = 20 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 3.0 4.2 ns t amb = - 30 c; v cc = 1.9 v - 2.9 4.1 ns t amb = +70 c; v cc = 1.62 v - 3.7 4.9 ns host side outputs: pins clk_fb, cmd_h and data0_h to data3_h reference points at 70 % and 20 % t t transition time c l = 5 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 1.5 2.4 ns t amb = - 30 c; v cc = 1.9 v - 1.3 2.3 ns t amb = +70 c; v cc = 1.62 v - 1.6 2.5 ns c l = 20 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 1.7 2.9 ns t amb = - 30 c; v cc = 1.9 v - 1.4 2.5 ns t amb = +70 c; v cc = 1.62 v - 1.8 3.0 ns reference points at 90 % and 10 % t t transition time c l = 5 pf; r l = 100 k w t amb = +25 c; v cc = 1.8 v - 2.4 3.1 ns t amb = - 30 c; v cc = 1.9 v - 2.3 3.0 ns t amb = +70 c; v cc = 1.62 v - 2.5 3.2 ns
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 10 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter [1] t pd is the same as high-to-low propagation delay (t phl ) and low-to-high propagation delay (t plh ). table 11. propagation delay of time domain response driver part v bat = 3.5 v; v o(reg) = 2.9 v; r source = 50 w ; propagation delay measurements include pcb delays and connectors. for timing diagram see figure 4 and for test circuit see figure 5 . symbol parameter conditions min typ max unit host side inputs to memory card side outputs t pd propagation delay nominal case; t amb = +27 c; v cc = 1.8 v [1] c l = 20 pf - 7.0 7.8 ns c l = 40 pf - 8.2 9.1 ns best case; t amb = - 30 c; v cc = 1.9 v c l = 20 pf - 6.5 7.3 ns c l = 40 pf - 7.5 8.5 ns worst case; t amb = +70 c; v cc = 1.62 v c l = 20 pf - 7.8 8.9 ns c l = 40 pf - 8.8 10.1 ns memory card side inputs to host side outputs t pd propagation delay nominal case; t amb = +27 c; v cc = 1.8 v [1] c l = 5 pf - 6.0 7.8 ns c l = 20 pf - 7.2 8.1 ns best case; t amb = - 30 c; v cc = 1.9 v c l = 5 pf - 5.9 6.9 ns c l = 20 pf - 6.7 8.5 ns worst case; t amb = +70 c; v cc = 1.62 v c l = 5 pf - 6.5 7.7 ns c l = 20 pf - 8.0 9.2 ns measuring points: host side at 0.5v cc and memory card side at 0.5v o(reg) . v ol and v oh are typical output voltage levels that occur with the output load. fig 4. output rise and fall times and data input to output propagation delay times (host side to card side or card side to host side) 001aae967 input output t plh t phl gnd 90 % (70 %) 10 % (20 %) v i v oh 50 % t t t t 50 % v ol
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 11 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter [1] power consumption is largely dependent on capacitive load connected to a driver output: p = v cc i cc + v bat i bat . table 12. power dissipation per channel v cc = 1.8 v; v bat = 4 v; all values are typical. memory card side c l = 20 pf and host side c l = 5 pf. frequency (mhz) i bat (ma) i cc (ma) p (mw) [1] host side input to memory card side output data channel 1.0 0.79 0.002 3.16 10.0 3.30 0.020 13.3 20.0 5.79 0.037 23.2 50.0 12.3 0.090 49.4 clock channel 1.0 0.44 0.05 1.85 10.0 3.1 0.59 13.5 20.0 5.4 0.97 23.4 50.0 12.2 2.36 53.1 memory card side input to host side output data channel 1.0 0.18 0.1 0.9 10.0 0.42 0.96 3.41 20.0 0.66 1.91 6.1 50.0 1.4 4.5 13.7
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 12 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 10. test information 11. marking de?nitions test circuit: r source = source resistance of pulse generator. r term = termination resistance should be equal to output impedance z 0 of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. fig 5. load circuitry for measuring switching time 50 % 50 % t w t w 20 % 70 % 0 v v i v i negative input positive input 0 v 50 % 50 % 70 % 20 % t f t r t r t f 001aah982 dut v cc v bat v i v o r term r source r l c l pulse generator t r = t f = 1.8 ns dut 50 w fig 6. marking of ip4853cx24/lf 001aah952 top view bump a1 indicator laser marking area
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 13 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 12. package outline fig 7. package outline ip4853cx24/lf (wlcsp24) references outline version european projection issue date iec jedec jeita ip4853cx24/lf ip4853cx24/lf 08-02-15 08-04-14 unit mm max nom min 0.66 0.61 0.56 0.22 0.20 0.18 0.29 0.26 0.23 2.06 2.01 1.96 2.06 2.01 1.96 0.4 1.6 a dimensions (mm are the original dimensions) wlcsp24: wafer level chip-size package; 24 bumps; 2.01 x 2.01 x 0.61 mm 0 1 2 mm scale a 1 a 2 0.44 0.41 0.38 b d e e e 1 1.6 e 2 bump a1 index area d e x detail x a a 2 a 1 b a b c d e 24 135 e 2 e 1 e e
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 14 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 13. packing information fig 8. tape and reel information 001aai051 b - b k 3 to 8 a - a b 0 t 1 g 5 max t k 0 a 0 p 2 p 0 d 0 w 1 p w f e d 1 q a b b a 0.05 / 40 direction of feed table 13. tape dimensions description item symbol speci?cation (mm) dimension tolerance overall dimensions tape width w 8.00 0.1 thickness k 1.20 max. distance g 0.75 min. sprocket holes [1] diameter d 0 1.50 +0.1 distance e 1.75 0.1 pitch p 0 4.00 0.1 distance between center lines length direction p 2 2.00 0.05 width direction f 3.50 0.05 compartments length a 0 2.20 0.05 width b 0 2.20 0.05 depth k 0 0.80 0.05 hole diameter d 1 0.50 +0.1 pitch p 4.00 0.1 device rotation q 20 max. carrier tape antistatic [2] ?lm thickness t 0.25 0.07 cover tape [3] width w 1 5.75 max. ?lm thickness t 1 0.1 max. bending radius in winding direction r 30 min.
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 15 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter [1] cumulated pitch error: 0.2 mm per 10 pitches. [2] carbon loaded polystyrene 100 % recyclable. [3] the cover tape shall not overlap the sprocket holes. 14. design and assembly recommendations 14.1 pcb design guidelines for the optimum performance, a non-solder mask design (nsmd) pcb design, also known as a copper de?ned design, incorporating laser-drilled micro-vias connecting the ground pads to a buried ground-plane layer is recommended. this results in the lowest possible ground inductance and provides the best high frequency and esd performance. for this case, refer to t ab le 14 for the recommended pcb design parameters. 14.2 pcb assembly guidelines for pb-free soldering table 14. recommended pcb design parameters pcb pad size 225 m m diameter micro-via diameter 100 m m solder mask opening 335 m m diameter copper thickness 20 m m to 40 m m copper ?nish osp pcb material fr4 table 15. assemble recommendations solder screen aperture size 255 m m diameter solder screen thickness 100 m m (0.004 ) solder paste: pb-free sn ag (3-4) cu (0.5-0.9) solder/?ux ratio 50 / 50 solder re?ow pro?le see figure 9
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 16 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 15. abbreviations the device is capable of withstanding at least three re?ows of this pro?le. fig 9. pb-free solder re?ow pro?le table 16. characteristics symbol parameter conditions min typ max unit t re?ow(peak) peak re?ow temperature d t= - 0 c to +5 c 230 - 255 c t 1 time 1 soak time 60 - 180 s t 2 time 2 time from t = 25 c to t re?ow(peak) 240 - 300 s t 3 time 3 time during t 3 250 c--30s t 4 time 4 time during t 3 230 c 10 - 50 s t 5 time 5 time during t > 217 c 30 - 150 s dt/dt rate of change of temperature cooling rate - - - 6 c/s pre-heat 2.5 - 4.0 c/s 001aai161 t reflow(peak) 250 230 217 t ( c) cooling rate pre-heat t 1 t 2 t 5 t 4 t 3 t (s) table 17. abbreviations acronym description dut device under test emi electromagnetic interference esd electrostatic discharge fr4 flame retard 4 mmc multi media card nsmd non-solder mask design osp organic solderability preservation pcb printed-circuit board psu power supply unit rohs restriction of hazardous substances
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 17 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 16. revision history sd secure digital t-?ash trans-?ash wlcsp wafer-level chip-scale package table 17. abbreviations continued acronym description table 18. revision history document id release date data sheet status change notice supersedes ip4853cx24_1 20080722 product data sheet - -
ip4853cx24_1 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 01 22 july 2008 18 of 19 nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 17.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 17.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 18. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors ip4853cx24 sd, mmc and t-?ash memory card integrated level shifter ? nxp b.v. 2008. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 22 july 2008 document identifier: ip4853cx24_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 19. contents 1 product pro?le . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 general description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 3 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 functional description . . . . . . . . . . . . . . . . . . . 5 5.1 logic control signals . . . . . . . . . . . . . . . . . . . . . 5 6 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 recommended operating conditions. . . . . . . . 6 8 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 9 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 10 test information . . . . . . . . . . . . . . . . . . . . . . . . 12 11 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 packing information. . . . . . . . . . . . . . . . . . . . . 14 14 design and assembly recommendations . . . 15 14.1 pcb design guidelines . . . . . . . . . . . . . . . . . . 15 14.2 pcb assembly guidelines for pb-free soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 17.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 contact information. . . . . . . . . . . . . . . . . . . . . 18 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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